Senior Staff Engineer Digital IP (f/m/div)

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are you ready to rethink the impossible? As a (Senior) Staff Engineer Digital IP in our Research & Development team, you'll have the opportunity to merge creativity with your technical expertise by shaping the future of technology, driving groundbreaking projects, and bringing new ideas to life.

Are you in? Your Role Key responsibilities in your new role * On hands-on digital IP design execution, including micro-architecture refinement, RTL implementation, design documentation, integration support, and release readiness * Develop high-quality RTL in SystemVerilog/ Verilog for reusable, configurable, and integration-ready IP blocks * Translate IP roadmap requirements into executable design plans, RTL deliverables, milestones, risks, and closure actions * Drive design quality closure through Lint, CDC, RDC, synthesis, DFT checks, ATPG readiness, and related sign-off activities * Debug and resolve block-level, integration-level, and system-level design issues in close collaboration with Verification, Architecture, Physical Design, DFX, Firmware, and System teams * Support development and integra