Senior Engineer Functional Verification (f/m/div)

#WeAreIn for jobs that impact everyone's life. What if your ideas could change the way the world connects, powers up, or thinks?

As a Senior Engineer Functional Verification on our Research & Development team, you'll have the opportunity to merge creativity with your technical expertise by shaping the future of technology, driving groundbreaking projects, and bringing new ideas to life. Are you In?

Your role Key responsibilities in your new role Contribute hands-on to IP and SoC verification , either building environments from scratch or using legacy verification environments and flows. Collaborate with IP design, verification, and software teams to define and refine requirements and prepare and review verification plans.

Set up, deploy, migrate, maintain, and maximize the reuse of verification environments. Develop SystemVerilog UVM-based components and environments and execute feature-based verification plans based on architecture specifications.

Debug failing tests, identify root causes, evaluate regressions and functional coverage , and enhance test cases to achieve 100% coverage. Improve development methodologies by applying artificial intelligence (AI), increasing efficiency,