Senior Engineer Digital Concept Engineering (f/m/div)

The position can be filled in Munich or Cork. Lead the PORT IP concept development, defining functional specifications, architectural constraints, design guidelines, and the roadmap across product families, including PPA trade-offs and feasibility studies Own the microcontroller and PORT IP architecture, ensuring scalability, power efficiency, and performance, while driving functional safety compliance (ISO 26262 up to ASIL-D) through safety mechanisms, safe I/O states, FMEDA contributions, and diagnostic coverage targets Drive the digital design, verification, and low-power strategy, implementing methodologies for robustness, early error detection, and high verification coverage, while defining CDC/RDC strategies, power domains, isolation, retention, and UPF/CPF concepts Own the safe and robust I/O architecture, including pin multiplexing, alternate-function architecture, pad control, drive strength, and slew-rate configuration, and coordinate digital-analog integration with analog/pad IP and interconnect teams Automate design and engineering processes with Python, developing solutions for design flows, simulation, data analysis, reporting, and automated generation of register map